The MORV Project – Modeling of Reliability under Variability


In MoRV the leading, aging effect focused research groups of industry (Infineon, IMEC, Global TCAD Solutions) and academia (TU Wien, Fraunhofer EAS, IROC, OFFIS) cooperate to create a quantum mechanical description and based on that to design simplified but accurate aging models of transistors, logic gates and even entire system components (e.g. an 8 bit multiplier). If a systems future performance, e.g. after years of usage, is already known during its design process, the system can be designed to adapt to its aged state and that decreases the required safety margins significantly.

The RESIST Project – Resilient Integrated Systems

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The RESIST project targets reliability aware design methods and run-time adaptive approaches for next-generation resilient integrated electronic systems in Automotive and Avionics. The focus is on reliability, cost-effectiveness and quality of semiconductor devices. The consortium consists of semiconductor companies, SME’s, academia, institutes, and end users.



ThinkDFR is an organization with a collection of skill sets in many areas such as hardware & software design, reliability and quality engineering, safety & compliance certification expertise, reliability test engineers, failure analysts and material scientists.

 RIIF Consortium


Complex silicon devices are increasingly controlling critical systems where safety and reliability are key concerns. Silicon technology is subject to numerous failure modes which can be broadly classified into soft- error effects (due to natural radiation) and life-time effects (e.g. electro-migration, NBTI, HCI). It is necessary to consider all of these failure modes and how they propagate through the system and produce user-visible effects. There are no consistent tools or methodologies to address this problem. Current ad-hoc approaches are not able to cope with the diversity of technology failure modes, increased design sizes and the complex relationships between consumers and suppliers of electronic components. RIIF (Reliability Information Interchange Format), is an initiative to develop a standard modelling language for specifying the failure mechanisms in silicon devices and systems built using these devices. One of the main goals of the workshop is to establish the requirements for the RIIF and assess the current implementation.